Reactive Ion Etching (RIE)


We are interested in understanding the plasma etching mechanism, which includes plasma phase chemistry, plasma-surface reactions, and surface reactions. We specialize in studying etch processes of non-conventional thin-film materials such as copper, indium tin oxide, metal oxides, a-Si:H, SiNx, and SiGex, for future generations of VLSI, TFT, and other microelectronics or opto-electronics. High temperature RIE is a powerful method that has the advantages of a simple reactor design and being easy to transfer to accommodate large substrates (e.g. 12" for VLSI and 1m x 1m for TFT LCDs). Some examples of recent results are shown as follows. For more detailed information, please see the Publications List.


Plasma-Based Copper Dry Etching Process

- the first world record of room temperature plasma etch process

- Applications in commercial IC fabrication BiCMOS chips

untitled5 CU-31E

Kuo, Proc. ICRP-6/Spp-23 2006

- Applications in commercial TFT LCD fabrication LG 15.0-inch (XGA) LCD

- Applications in complete Cu source, drain, and gate electrodes in a-Si:H TFT

Liu & Kuo, ECS Plasma XV proc. 2003.

Kuo, et al, JKPS, 2005

 

- Room Temperature Process

Vertical Profile

profile

Y. Kuo and S. Lee. Appl. Phys. Lett. 78(7), 1002-1004, 2001.

S. Lee and Y. Kuo. J. Electrochemical Society. 148(9), G524-529, 2001.

0.8m Line

0

A 0.8 micrometer Cu line etched by HCl/Ar plasma

Y. Kuo, et al. Proc. ISSP 2003, p. 305-308. and Vac. 2004

- No Plasma vs. Plasma

HCl Exposed Cu no plasma

HCl Plasma Exposed Cu

S. Lee and Y. Kuo, JJAP 41, 1(12), 2003.

- Process Parameters: exposure time

HCl Exposed Cu

Cu RIE added Slide2

S. Lee and Y. Kuo, Thin Solid Films, 2003.

- Structures of plasma-Cu reaction products

CuBrx from HBr Plasma Exposure

Cu RIE added Slide3

S. Lee and Y. Kuo, Thin Solid Films, 2003.

Cu RIE added Slide4

S. Lee and Y. Kuo, JJAP 41, 1(12), 2002.

- Grain Size Effects

Cu film grain size and resistivity change with temperature

CuClx formation and Cu conversion rates vs. temperature

G. Liu, Y. Kuo, et al., JES 155 H432 (2008).

- Reaction Mechanisms

image019

Y. Kuo and S. Lee, ECS Proc. 99-30, 328, 1999.

Cu-RIE

Y. Kuo & S. Lee, Jpn. J. Appl. Phys. 39, 2(3A/B), L801, 2000.

APL CuCl before & after stripping

Y. Kuo & S. Lee, APL 78(7), 1002, 2001.

- Reliability of Etched Cu Lines Electronmigration tests

Isothermal EM test (a) resistance and (b) temperature vs. time during.

 

Cumulative failure distribution of flat Cu lines

 

 

- Reliability of Flexible Electronics Application of Etched Cu Lines

(a) Cu line for EM test. (b) 3-point bending setup. (c) Bent Cu line sample plate.

Void distributions in (a) flat line and (b) bent line of EM at 350C.

Cumulative failure distribution of bent Cu lines


Home, TFTs, High k Gate Dielectrics, Low k dielectrics, PECVD, Biochips, Laboratory, Publications, Activities, Presentations, Links